Antenna-based applications require power detectors, which are if possible intended to be implemented on the basis of CMOS technology. For these power detectors, it is necessary for them to receive a high-frequency power carried by an electromagnetic wave and output a DC electrical voltage which is in a fixed proportionality ratio to the received high-frequency power. Various aspects of these detectors are essential for the configuration and include their CMOS compatibility, a high sensitivity of the detector, a power consumption which is as low as possible, noise which is as low as possible in a DC voltage signal provided, and the smallest possible harmonics of the high frequency.
Various approaches are currently customary for complying as far as possible with the requirements of a corresponding power detector. In a first approach, passive pn diode-based or Schottky diode-based power detectors are used. For these, however, in particular the problems of high harmonics to a base high frequency and a lack of CMOS compatibility of many Schottky diode-based power detectors arise. In a second approach, active power detectors which are based on cascade or logarithmic amplifiers are used. However, the problem arises here of particularly high power consumption. In a third approach, thermal power detectors are used. These, however, have a very low sensitivity.
It is therefore an object to provide an apparatus having improved properties for converting the electrical power of an electromagnetic wave into a DC electrical voltage signal.